On Wed, 15 Oct 1997, Clay Cowgill wrote:
> Soooo... Five or six weeks from now hopefully I'll be able to make little
> runs of boards (like a few to a dozen depending on size) without too much
> hassle. We'll see! Should help get little things like ESB NOVRAM boards
> and Monitor Testers (and misc stuff) cleared out. Nice for PCB projects
> where setup charges would be more than the cost of the actual board
> materials...
>
<In my best Mike Myers voice> Yeah Baby!
I'm already halfway done with the verilog model. The next step is
to see what PLD design tools I have access to either here, or at UTexas.
Of course, the old fallback is PALASM, and I can use AMD parts to make
this. (I'd have to re-write my code in PALASM format though :( ) What
I'm hoping is that we bought Synopsys FPGA compiler. That would be very
nice...
Joe
